AN OPTIMAL DESIGN OF REVERSIBLE LOGIC GATES USING QCA

Abstracts

CMOS technology is facing several physical challenges at the nano-scale. Therefore, technology roadmap for semiconductors, calls investigation for new alternative solutions to continue the scaling-down trend of CMOS. Quantum-dot cellular automata, is one of the most prominent powerless nanotechnologies considered to continue scaling-down trend of sub-micron electronics. It advantages small size, and better switching frequency than traditional approaches. Numerous combinational and sequential circuits have been reconstructed and implemented using this technology. Low power and reduced heat dissipation is an increasing demand for data transmission in digital systems. Therefore, reversible logic is the most emerging archetype issue at present time in research area, which indeed has lower power consumption and reduced heat dissipation. This paper presents a new well optimized reversible logic gates such as the Peres gate, the TR gate and the BNJ gate. The proposed 2-input XOR are used the implementation of reversible gates. The simplest and effective techniques used to compute reversible logic. The improved reversible logic gates have achieved significant improvements in overall circuit parameters including area and circuit complexity among the most previously cost-efficient designs that exploit the inevitable nano-level issues to perform computing. The proposed designs have been verified and simulated using QCADesigner tool ver. 2.0.3.

Keywords : Nanotechnology; QCA; XOR; Peres gate; TR; BNJ gate; QCADesigner tool.

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